CV

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Contact Information

Name Charles Harrison Brammell III
Professional Title Computer Engineering Student
Email [email protected]
Phone 504-812-3125
Location 5918 Laurel Street, New Orleans, Louisiana 70115

Professional Summary

I am a Computer Engineering student at Auburn University with hands-on experience in MRI reconstruction research, digital hardware design, and software analytics.

Experience

  • 2025 - Present

    Auburn, Alabama

    Summer Undergraduate Research Fellow / Research Assistant
    Auburn Neuroimaging Research Center
    I modified and optimized existing MRI reconstruction algorithms to accommodate muscle tissue, while preparing technical findings for professional research audiences.
    • Modified and optimized MRI reconstruction algorithms for muscle tissue.
    • Analyzed Diffusion Tensor Imaging and Extended Phase Graph methods to improve post-processing.
    • Compared image correction methods and synthesized findings in a formal technical presentation.
  • 2023 - 2023

    New Orleans, Louisiana

    Software Intern
    See No Fees Financial
    • Developed custom tooling for data analytics for internal teams and clients.
    • Implemented data collection across internet properties for lead generation.
    • Prepared instructional materials and trained sales staff on analytics interpretation.
    • Researched custom card processing solutions for client-specific needs.
  • 2020 - 2024

    New Orleans, Louisiana

    Senior Delivery Agent
    D’Livery NOLA
    • Ensured timely delivery of goods with special handling for temperature-controlled medications.
    • Completed emergency routes outside scheduled hours with minimal notice.

Education

  • 2022 - 2026

    Auburn, Alabama

    Bachelors of Science
    Auburn University
    Computer Engineering
    • Minor in Finance

Involvement

Projects

  • Interactive LLM Tokenizer Analysis Framework

    I designed a modular evaluation framework to benchmark BPE, WordPiece, and SentencePiece tokenizers.

    • Built custom drivers to wrap tokenizers for scalable benchmarking.
    • Developed a toolbox for implementing novel datasets, models, and evaluation metrics.
    • Evaluated tokenizer bias impact on processing speed, memory, and compute costs.
  • FPGA AES Encryption Accelerator

    I engineered a hardware-accelerated AES encryption module optimized for Nexys A7 FPGA deployment.

    • Designed the system architecture in Vivado and implemented UART/SPI interfaces.
    • Built a robust serial communication interface bridging the FPGA with external data sources.

Skills

Technical Skills (Advanced): Signal Processing, Digital Hardware Design, Embedded Systems, Experiment Design, Mathematics, System Integration, C/C++, System Verilog, Matlab, Python, Electrical Test Equipment, Java, SPICE, LaTeX
Interpersonal Skills (Strong): Leadership, Technical Communication, Creativity, Collaboration, Teamwork, Flexibility

Languages

English : Fluent

Interests

Engineering: MRI Research, Digital Hardware, Algorithm Design, Data Analytics, Robotics